When the Raspberry Pi Foundation introduced the original RP2040 microcontroller on the $4 Pico board in 2021, it revolutionized the maker and embedded engineering landscape. Its dual ARM Cortex-M0+ cores and revolutionary Programmable I/O (PIO) state machines made hardware interfacing accessible like never before. However, the original chip lacked hardware floating-point units (FPU), hardware security primitives, and deep sleep power efficiency.
The Raspberry Pi Pico 2, powered by the brand-new RP2350 microcontroller, addresses every shortcoming of its predecessor in spectacular fashion. Rather than simply boosting clock speed, Raspberry Pi engineered an audacious, world-first silicon architecture: a chip containing two dual-core pairs, allowing developers to boot either into a dual-core ARM Cortex-M33 or a dual-core open-source Hazard3 RISC-V environment.
The RP2350 Quad-Core Dual-Architecture Silicon Matrix
The RP2350 die physically contains four processor cores, but operates as a dual-core machine. At boot time (or dynamically via software reconfiguration), you select which core pair executes instructions:
| Architectural Feature | Pair A: Dual ARM Cortex-M33 | Pair B: Dual Hazard3 RISC-V |
|---|---|---|
| Instruction Set (ISA) | ARMv8-M Mainline (32-bit Thumb-2) | RV32IMAC + Zba, Zbb, Zbc, Zbs, Zbkb |
| Clock Frequency | 150 MHz (Easily overclocks to 250+ MHz) | 150 MHz (Consistent deterministic timing) |
| Floating Point Unit | Hardware Single-Precision FPU (FPv5) | Software emulated via fast integer math |
| Hardware DSP | Dedicated SIMD DSP instructions | Bit-manipulation extensions (Zbb/Zbkb) |
| Security Primitives | ARM TrustZone-M Secure Isolation | PMP (Physical Memory Protection) |
| Ecosystem & Toolchains | GCC ARM, Clang, Keil, CMSIS-DSP | GCC RISC-V (rv32imac), OpenOCD |
Key Silicon Upgrades Over the Legacy RP2040
The RP2350 is substantially more capable across every architectural metric:
- Massive SRAM Expansion: SRAM jumps from 264 KB on the RP2040 to a sprawling 520 KB partitioned across 10 independent banks, eliminating memory bottlenecks in audio and display processing.
- Hardware Cryptographic Engine: An onboard SHA-256 accelerator, TRNG (True Random Number Generator), and 8 KB of write-once One-Time Programmable (OTP) memory enable genuine Secure Boot and signed firmware validation.
- Programmable I/O Upgrade (PIO2): The chip expands from two to three PIO blocks (total of 12 independent state machines), each featuring a deeper FIFO buffer and expanded instruction sets for driving high-res DVI displays and high-speed memory buses.
- Ultra-Low Power Modes: Sleep current drops by orders of magnitude compared to the RP2040, making battery-powered field sensors viable without external power gating circuitry.
ARM TrustZone: Hardened Embedded Security
For commercial IoT applications, the inclusion of ARM TrustZone on Cortex-M33 marks a major milestone. Memory and peripherals can be partitioned into Secure and Non-Secure worlds:
- The Secure World houses proprietary cryptographic private keys, firmware update decryption routines, and authentication credentials.
- The Non-Secure World runs standard application logic, peripheral sensor polling, and network communication.
- Even if a buffer overflow exploits the user-facing application code, the attacker cannot read or tamper with the secure memory enclave or extract private keys.
Switching Between ARM and RISC-V in Firmware
Raspberry Pi’s updated Pico SDK allows selecting your active architecture via a simple flag in your project’s CMakeLists.txt:
# Build using standard ARM Cortex-M33
set(PICO_PLATFORM rp2350-arm-s)
# Or switch to open-source Hazard3 RISC-V cores
set(PICO_PLATFORM rp2350-riscv)
The Hazard3 core was custom-designed by Luke Wren, an engineer at Raspberry Pi. It delivers outstanding code density and IPC (instructions per cycle) performance, making it one of the most efficient embedded RISC-V cores in production.
Which Core Pair Should You Use?
- Choose ARM Cortex-M33: When your workload demands heavy single-precision floating-point trigonometry, digital audio filtering (DSP), or commercial TrustZone firmware signing.
- Choose Hazard3 RISC-V: For open-source purists, academic research, custom instruction exploration, or embedded projects seeking freedom from proprietary core licensing architectures.
